Synchronization and Metastability by Steve Golson
Abstract: The phenomenon of metastability is inherent in clocked digital logic. Many techniques have been presented for minimizing metastability, both for crossing clock domains, and for handling asynchronous inputs. Some of these “best practices” have unexpected weaknesses and must be used carefully, particularly at smaller process nodes. This paper will explore these shortcomings and suggest alternative schemes that are more robust. A PrimeTime methodology for verifying multi-clock designs will be presented.
This won the Best Paper Award.
If you have access to Synopsys SolvNet, you can watch a recording of my presentation. You can listen to the audio and watch the slides.
I also presented this paper at Boston SNUG in September 2014.